An FPGA Implementation of an Oversampling, Second-order Noise Shaping DAC
نویسنده
چکیده
An oversampling, noise-shaping digital-to-analog converter architecture is designed and implemented in a Xilinx Spartan-II FieldProgrammable Gate Array. The system uses 128-times and 256-times oversampling and has zero-, first-, and second-order noise shapers which may be selected by the end user in real-time. 1-bit DAC output is passed through a 4-pole analog Butterworth filter. Particular emphasis is paid to minimizing silicon space and achieving performance comparable to that of Phillips Semiconductor’s UDA1320ATS device, as well as allowing the ned user to select oversampling rate and noise-shaping order.
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